riscv-utils

Scheme utility procedures for the RISC-V instruction set architecture

git clone https://git.8pit.net/riscv-utils.git

 1;; Machine code for a given instruction can be obtained
 2;; easily using: riscv32-unknown-elf-objdump -d <binary>.
 3
 4;; add x11, x12, x10
 5(define add-instr #x00a605b3)
 6;; addi x5, x6, 42
 7(define addi-instr #x02a30293)
 8;; sw x1, 23(x9)
 9(define sw-instr #x0014aba3)
10;; lui x28, 0xfffff
11(define lui-instr #xfffffe37)
12;; beq x10, x11, 32
13(define beq-instr #x02b50063)
14;; jal ra, 32
15(define jal-instr #x020000ef)