scc

  1enum args {
  2	AREG_CS = AMAX,
  3	AREG_DS,
  4	AREG_SS,
  5	AREG_ES,
  6	AREG_FS,
  7	AREG_GS,
  8
  9	AREG_EFLAGS,
 10	AREG_CF,
 11	AREG_PF,
 12	AREG_AF,
 13	AREG_ZF,
 14	AREG_SF,
 15	AREG_TF,
 16	AREG_IF,
 17	AREG_DF,
 18	AREG_OF,
 19	AREG_IOPL,
 20	AREG_NT,
 21	AREG_RF,
 22	AREG_VM,
 23	AREG_AC,
 24	AREG_VIF,
 25	AREG_VIP,
 26	AREG_ID,
 27
 28	AREG_AX,
 29	AREG_AL,
 30	AREG_AH,
 31	AREG_EAX,
 32	AREG_RAX,
 33
 34	AREG_BX,
 35	AREG_BL,
 36	AREG_BH,
 37	AREG_EBX,
 38	AREG_RBX,
 39
 40	AREG_CX,
 41	AREG_CL,
 42	AREG_CH,
 43	AREG_ECX,
 44	AREG_RCX,
 45
 46	AREG_DX,
 47	AREG_DL,
 48	AREG_DH,
 49	AREG_EDX,
 50	AREG_RDX,
 51
 52	AREG_SI,
 53	AREG_SIL,
 54	AREG_ESI,
 55	AREG_RSI,
 56	AREG_DI,
 57	AREG_DIL,
 58	AREG_EDI,
 59	AREG_RDI,
 60
 61	AREG_SP,
 62	AREG_SPL,
 63	AREG_ESP,
 64	AREG_RSP,
 65
 66	AREG_BP,
 67	AREG_BPL,
 68	AREG_EBP,
 69	AREG_RBP,
 70
 71	AREG_R0,
 72	AREG_MM0,
 73	AREG_R1,
 74	AREG_MM1,
 75	AREG_R2,
 76	AREG_MM2,
 77	AREG_R3,
 78	AREG_MM3,
 79	AREG_R4,
 80	AREG_MM4,
 81	AREG_R5,
 82	AREG_MM5,
 83	AREG_R6,
 84	AREG_MM6,
 85	AREG_R7,
 86	AREG_MM7,
 87
 88	AREG_R8,
 89	AREG_R8L,
 90	AREG_R8W,
 91	AREG_R9,
 92	AREG_R9L,
 93	AREG_R9W,
 94	AREG_R10,
 95	AREG_R10L,
 96	AREG_R10W,
 97	AREG_R11,
 98	AREG_R11L,
 99	AREG_R11W,
100	AREG_R12,
101	AREG_R12L,
102	AREG_R12W,
103	AREG_R13,
104	AREG_R13L,
105	AREG_R13W,
106	AREG_R14,
107	AREG_R14L,
108	AREG_R14W,
109	AREG_R15,
110	AREG_R15L,
111	AREG_R15W,
112
113	AREG_XMM0,
114	AREG_XMM1,
115	AREG_XMM2,
116	AREG_XMM3,
117	AREG_XMM4,
118	AREG_XMM5,
119	AREG_XMM6,
120	AREG_XMM7,
121	AREG_XMM8,
122	AREG_XMM9,
123	AREG_XMM10,
124	AREG_XMM11,
125	AREG_XMM12,
126	AREG_XMM13,
127	AREG_XMM14,
128	AREG_XMM15,
129
130	AREG_YMM0,
131	AREG_YMM1,
132	AREG_YMM2,
133	AREG_YMM3,
134	AREG_YMM4,
135	AREG_YMM5,
136	AREG_YMM6,
137	AREG_YMM7,
138	AREG_YMM8,
139	AREG_YMM9,
140	AREG_YMM10,
141	AREG_YMM11,
142	AREG_YMM12,
143	AREG_YMM13,
144	AREG_YMM14,
145	AREG_YMM15,
146
147	AREG_MXCSR,
148
149	AREG_R8CLASS,	/* register class for 8 bit registers in i286 */
150	AREG_R16CLASS,	/* register class for 16 bit registers in i286,i386,amd64 */
151	AREG_R32CLASS,  /* register class for 32 bit registers in i386,amd64 */
152};
153
154enum class {
155	R8CLASS  = 1 << 0,
156	R16CLASS = 1 << 1,
157	R32CLASS = 1 << 2,
158};