zig-riscv-embedded

Experimental Zig-based CoAP node for the HiFive1 RISC-V board

git clone https://git.8pit.net/zig-riscv-embedded.git

 1#!/bin/sh
 2# From https://github.com/sifive/freedom-e-sdk/blob/c07ac84cbdd678963c4dc3ea34a68c47a8b53651/scripts/upload
 3#
 4# Copyright (c) 2019 SiFive, Inc.
 5# Licensed under Apache2 and MIT licenses.
 6
 7set -e
 8
 9ELF_FILE=./zig-out/bin/main
10export GDB_PORT=3333
11
12openocd -f openocd.cfg &
13
14gdb-multiarch $ELF_FILE --batch -ex "set remotetimeout 240" \
15	-ex "target extended-remote localhost:${GDB_PORT}" \
16	-ex "monitor reset halt" \
17	-ex "monitor flash protect 0 64 last off" \
18	-ex "thread apply all set \$pc=_enter" \
19	-ex "load" \
20	-ex "monitor resume" \
21	-ex "monitor shutdown" -ex "quit"